Programmable cyclic redundancy check encoder/decoder with VLSI implementation.
ABSTRACT see Upload (MT ENGRNG 43 1993)
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| Format: | Theses and Dissertations NonPeerReviewed |
| Published: |
1993
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| Online Access: | http://thesis.dlsud.edu.ph/3943/1/Programmable%20cyclic...%20-%20Roderick%20Yap.pdf http://thesis.dlsud.edu.ph/3943/2/MT%20ENGRNG%2043.pdf http://thesis.dlsud.edu.ph/3943/ |
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| Institution: | De La Salle University |
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ph-dlsud-lib.39432016-06-29T08:27:29Z Programmable cyclic redundancy check encoder/decoder with VLSI implementation. Yap, Roderick Y. T Technology (General) ABSTRACT see Upload (MT ENGRNG 43 1993) 1993 Thesis NonPeerReviewed text http://thesis.dlsud.edu.ph/3943/1/Programmable%20cyclic...%20-%20Roderick%20Yap.pdf text http://thesis.dlsud.edu.ph/3943/2/MT%20ENGRNG%2043.pdf Yap, Roderick Y. (1993) Programmable cyclic redundancy check encoder/decoder with VLSI implementation. Masters thesis, De La Salle University - Dasmariñas. http://thesis.dlsud.edu.ph/3943/ |
| institution |
De La Salle University |
| building |
De La Salle University Library |
| country |
Philippines |
| collection |
DLSU Institutional Repository |
| topic |
T Technology (General) |
| spellingShingle |
T Technology (General) Yap, Roderick Y. Programmable cyclic redundancy check encoder/decoder with VLSI implementation. |
| description |
ABSTRACT see Upload (MT ENGRNG 43 1993) |
| format |
Theses and Dissertations NonPeerReviewed |
| author |
Yap, Roderick Y. |
| author_facet |
Yap, Roderick Y. |
| author_sort |
Yap, Roderick Y. |
| title |
Programmable cyclic redundancy check encoder/decoder with VLSI implementation. |
| title_short |
Programmable cyclic redundancy check encoder/decoder with VLSI implementation. |
| title_full |
Programmable cyclic redundancy check encoder/decoder with VLSI implementation. |
| title_fullStr |
Programmable cyclic redundancy check encoder/decoder with VLSI implementation. |
| title_full_unstemmed |
Programmable cyclic redundancy check encoder/decoder with VLSI implementation. |
| title_sort |
programmable cyclic redundancy check encoder/decoder with vlsi implementation. |
| publishDate |
1993 |
| url |
http://thesis.dlsud.edu.ph/3943/1/Programmable%20cyclic...%20-%20Roderick%20Yap.pdf http://thesis.dlsud.edu.ph/3943/2/MT%20ENGRNG%2043.pdf http://thesis.dlsud.edu.ph/3943/ |
| _version_ |
1681502994418368512 |