A 1.2-V 1.5-Gb/s 72-Mb DDR3 SRAM

• Main Authors: Cho, Uk Rae, Kim, Tony Tae-Hyoung, Yoon, Yong-Jin, Lee, Jong Cheol, Bae, Dae Gi, Kim, Nam Seog, Kim, Kang Young, Son, Young Jae, Yang, Jeong Suk, Sohn, Kwon Il, Kim, Sung Tae, Lee, In Yeol, Lee, Kwang Jin, Kang, Tae Gyoung, Kim, Su Chul, Ahn, Kee Sik, Byun, Hyun Geun
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2010
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• 在線閱讀: https://hdl.handle.net/10356/100928; http://hdl.handle.net/10220/6438
• 機構: Nanyang Technological University

A 1.2-V 72-Mb double data rate 3 (DDR3) SRAM achieves a data rate of 1.5 Gb/s using dynamic self-resetting circuits [5]. Single-ended main data lines halve the data line...