A D-band cascode amplifier with 24.3 dB gain and 7.7 dBm output power in 0.13 μm SiGe BiCMOS technology

• Main Authors: Hou, Debin, Xiong, Yong-Zhong, Goh, Wang Ling, Hong, Wei, Madihian, Mohammad
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2013
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/102738; http://hdl.handle.net/10220/16411
• Institution: Nanyang Technological University

This letter describes a D-band 3-stage cascode amplifier developed using the IHP 0.13 μm SiGe BiCMOS technology. The amplifier is implemented with low-loss transformer for inter-stage matching and single-to-differential transformation. The large-signal characteristics of the cascode HBT configuration are used to optimize the bias condition for highest output power and gain performance. A measured amplifier achieves a peak power gain of 24.3 dB, with a 3 dB bandwidth of 20 GHz centered at 130 GHz. The amplifier exhibits a saturated output power of 7.7 dBm and an output 1 dB gain compression point of 6 dBm with a power consumption of 84 mW. The measured noise figure is 6.8 dB at 130 GHz and stays under 8 dB over the 3 dB bandwidth. To the best of our knowledge, the proposed amplifier exhibits the highest gain and output power among the silicon-based D-band amplifiers reported so far.