A high-speed 2-bit/cycle SAR ADC with time-domain quantization

• المؤلفون الرئيسيون: Qiu, Lei, Yang, Chuanshi, Wang, Keping, Zheng, Yuanjin
• مؤلفون آخرون: School of Electrical and Electronic Engineering
• التنسيق: مقال
• اللغة: English
• منشور في: 2020
• الموضوعات: Engineering::Electrical and electronic engineering; 2 Bit/cycle; Analog-to-digital Converter (ADC)
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/142511

This brief presents a 2-bit/cycle successive approximation register (SAR) analog-to-digital converter (ADC) with time-domain quantization, which only needs one capacitive digital-to-analog converter (DAC) array. A duplicated dynamic comparator is adopted to generate the time references. To quantize...