Ultra-thin bulk silicon thinning of advanced microprocessors & graphics processors fabricated in Sub-20 nm technology

• Main Author: Teo, Wee Siang
• Other Authors: Gan Chee Lip
• Format: Thesis-Master by Research
• Language: English
• Published: Nanyang Technological University 2020
• Subjects: Engineering::Materials::Microelectronics and semiconductor materials
• Online Access: https://hdl.handle.net/10356/144132
• Institution: Nanyang Technological University

The continual advancement of integrated circuits has seen the relentless scaling of minimum dimensions for semiconductor devices. Consequently, the burgeoning complexity of process technology and devices fabricated has necessitated advancements in device characterisation all through the failure analysis workflow. In particular, initial fault isolation techniques exploit infrared laser beams to probe the circuitry through silicon thinned mechanically to 50 um. Moving down to sub-20 nm process nodes, the infrared based lasers are challenged to resolve minute features as it hits its resolution limits. There is thus a need to use shorter wavelengths beam probes in the visible spectrum and beyond. However, visible light’s higher absorption coefficient in silicon necessitates silicon to be ultra-thinned to under 10 um to reduce signal attenuation. With existing contour milling techniques limited by its precision when ultra-thinning silicon, experiments were then conducted to understand key challenges in terms of the sample behaviour during thinning. Thereafter, a modified workflow was proposed to account for sample relaxation during ultra-thinning and tested on actual devices. With ultra-thinned samples prepared, challenges relating to the device’s thermal stability were then subsequently encountered. In overcoming these difficulties, targeted 2D and 3D thinning techniques were then explored and validated on actual devices prepared. In anticipation of further advanced probing techniques necessitating sub-micron remaining silicon thicknesses, focused ion beam milling techniques were then explored as a means to further localise ultrathin silicon to the area of interest. As a means for precise material removal, the milling rate was first characterised on different systems before the resulting milling finish was studied as a function of the beam parameters. The proposed workflow was then examined with its application on actual thinned devices. Process challenges and limitations were then discussed in relation to its application.