A 0.5 V 8-12 bit 300 KSPS SAR ADC with adaptive conversion time detection-and-control for high immunity to PVT variations

• Main Authors: Kim, Ju Eon, Yoo, Taegeun, Jung, Dong-Kyu, Yoon, Dong-Hyun, Seong, Kiho, Kim, Tony Tae-Hyoung, Baek, Kwang-Hyun
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2021
• Subjects: Engineering::Electrical and electronic engineering; Asynchronous; Compensation
• Online Access: https://hdl.handle.net/10356/145808
• Institution: Nanyang Technological University

In this paper, a low power asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) involving the process, voltage, and temperature (PVT) compensation is presented. A proposed adaptive conversion time detection-and-control technique enhances the power efficiency, coveri...