Low power CMOS multiplier IC design
This dissertation mainly studies the design of a 16-bit low-power multiplier. Based on the widespread application of multipliers and the market's demand for low-power circuits, the main goal of this dissertation is to reduce the power consumption of the multiplier by no less than one-tenth. The...
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| Format: | Thesis-Master by Coursework |
| Language: | English |
| Published: |
Nanyang Technological University
2023
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| Online Access: | https://hdl.handle.net/10356/167760 |
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| Institution: | Nanyang Technological University |
| Language: | English |