Delay sensitivity analysis of scaled BiCMOS/CMOS/ECL circuits

• 主要作者: Sin, You Seng.
• 其他作者: Yeo, Kiat Seng
• 格式: Theses and Dissertations
• 語言: English
• 出版: 2009
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• 在線閱讀: http://hdl.handle.net/10356/19686
• 機構: Nanyang Technological University

The speed sensitivity of the BiCMOS, CMOS and ECL inverter circuits to changes in the key MOS/BJT device parameters is analyzed. The study of BiCMOS circuit takes into account the changes in the forward transit time, the knee current, the collector resistance, the base resistance, and the current ga...