Delay sensitivity analysis of scaled BiCMOS/CMOS/ECL circuits

• المؤلف الرئيسي: Sin, You Seng.
• مؤلفون آخرون: Yeo, Kiat Seng
• التنسيق: Theses and Dissertations
• اللغة: English
• منشور في: 2009
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/19686

The speed sensitivity of the BiCMOS, CMOS and ECL inverter circuits to changes in the key MOS/BJT device parameters is analyzed. The study of BiCMOS circuit takes into account the changes in the forward transit time, the knee current, the collector resistance, the base resistance, and the current ga...