Macromodelling of analogue circuits using VHDL-AMS
The purpose of this project is to implement the top down design system by using VHDL-AMS. VHDL-AMS, an analogue hardware description language and an extension to Very High-Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL), is capable of modelling analogue models by using additio...
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主要作者: | Su, Latt Mon. |
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其他作者: | Lam, Yvonne Ying Hung |
格式: | Theses and Dissertations |
出版: |
2008
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在線閱讀: | http://hdl.handle.net/10356/3298 |
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