Design of high performance CMOS latches and flip-flops

• 主要作者: Tan, Teck Heng.
• 其他作者: Yeo, Kiat Seng
• 格式: Theses and Dissertations
• 出版: 2008
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• 在線閱讀: http://hdl.handle.net/10356/3390

Recommend ways to implement the various Double Edge Triggered Flip-Flop (DETFF) so that it can operate at the highest possible clock frequency, low enough operating nominal voltage and less power consumed by exploring various design circuit topologies and coming out with the best one with the curren...