Realization of trenched SOI structure using wafer bonding technique

In this project, the realization of a trenched SOI substrate is carried out, and the characterization of the CMP planarization together with a new polysilicon shallow trench isolation (STI) technique is studied.

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Main Author: Teo, Kim Poh.
Other Authors: Goh, Wang Ling
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/3559
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-35592023-07-04T15:07:07Z Realization of trenched SOI structure using wafer bonding technique Teo, Kim Poh. Goh, Wang Ling School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic packaging In this project, the realization of a trenched SOI substrate is carried out, and the characterization of the CMP planarization together with a new polysilicon shallow trench isolation (STI) technique is studied. Doctor of Philosophy (EEE) 2008-09-17T09:32:22Z 2008-09-17T09:32:22Z 2001 2001 Thesis http://hdl.handle.net/10356/3559 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic packaging
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic packaging
Teo, Kim Poh.
Realization of trenched SOI structure using wafer bonding technique
description In this project, the realization of a trenched SOI substrate is carried out, and the characterization of the CMP planarization together with a new polysilicon shallow trench isolation (STI) technique is studied.
author2 Goh, Wang Ling
author_facet Goh, Wang Ling
Teo, Kim Poh.
format Theses and Dissertations
author Teo, Kim Poh.
author_sort Teo, Kim Poh.
title Realization of trenched SOI structure using wafer bonding technique
title_short Realization of trenched SOI structure using wafer bonding technique
title_full Realization of trenched SOI structure using wafer bonding technique
title_fullStr Realization of trenched SOI structure using wafer bonding technique
title_full_unstemmed Realization of trenched SOI structure using wafer bonding technique
title_sort realization of trenched soi structure using wafer bonding technique
publishDate 2008
url http://hdl.handle.net/10356/3559
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