Realization of trenched SOI structure using wafer bonding technique

In this project, the realization of a trenched SOI substrate is carried out, and the characterization of the CMP planarization together with a new polysilicon shallow trench isolation (STI) technique is studied.

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Bibliographic Details
Main Author: Teo, Kim Poh.
Other Authors: Goh, Wang Ling
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/3559
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Institution: Nanyang Technological University

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