CMOS differential logic circuits for low power and high-speed applications

A new CSDL circuit is proposed which reduces the number of transistors and input signals required compared to the original CSDL circuit.

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書目詳細資料
主要作者: They, Kian Seng
其他作者: Lau, Kim Teen
格式: Theses and Dissertations
出版: 2008
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在線閱讀:http://hdl.handle.net/10356/3586
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