CMOS differential logic circuits for low power and high-speed applications

CMOS differential logic circuits for low power and high-speed applications

A new CSDL circuit is proposed which reduces the number of transistors and input signals required compared to the original CSDL circuit.

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Bibliographic Details
Main Author:	They, Kian Seng
Other Authors:	Lau, Kim Teen
Format:	Theses and Dissertations
Published:	2008
Subjects:	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Online Access:	http://hdl.handle.net/10356/3586
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	Nanyang Technological University

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