Improvement in speed performance through transistor process optimization

This thesis presents the means to achieve higher speed yield for CMOS logic circuits through transistor optimization. Experiments were carried out to study the effect of each process condition on transistor drive current and its timing parameter. Based on the obtained results, selection of process c...

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Bibliographic Details
Main Author:	Zheng, You.
Other Authors:	Prasad, Krishnamachar
Format:	Theses and Dissertations
Published:	2008
Subjects:	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Online Access:	http://hdl.handle.net/10356/4046
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Institution:	Nanyang Technological University

id	sg-ntu-dr.10356-4046
record_format	dspace
spelling	sg-ntu-dr.10356-40462023-07-04T15:59:43Z Improvement in speed performance through transistor process optimization Zheng, You. Prasad, Krishnamachar School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits This thesis presents the means to achieve higher speed yield for CMOS logic circuits through transistor optimization. Experiments were carried out to study the effect of each process condition on transistor drive current and its timing parameter. Based on the obtained results, selection of process conditions to achieve desired transistor drive current are presented. A linear model has been developed to predict the transistor drive current based on in-line measurement data. Master of Science (Microelectronics) 2008-09-17T09:43:11Z 2008-09-17T09:43:11Z 2003 2003 Thesis http://hdl.handle.net/10356/4046 Nanyang Technological University application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
topic	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits Zheng, You. Improvement in speed performance through transistor process optimization
description	This thesis presents the means to achieve higher speed yield for CMOS logic circuits through transistor optimization. Experiments were carried out to study the effect of each process condition on transistor drive current and its timing parameter. Based on the obtained results, selection of process conditions to achieve desired transistor drive current are presented. A linear model has been developed to predict the transistor drive current based on in-line measurement data.
author2	Prasad, Krishnamachar
author_facet	Prasad, Krishnamachar Zheng, You.
format	Theses and Dissertations
author	Zheng, You.
author_sort	Zheng, You.
title	Improvement in speed performance through transistor process optimization
title_short	Improvement in speed performance through transistor process optimization
title_full	Improvement in speed performance through transistor process optimization
title_fullStr	Improvement in speed performance through transistor process optimization
title_full_unstemmed	Improvement in speed performance through transistor process optimization
title_sort	improvement in speed performance through transistor process optimization
publishDate	2008
url	http://hdl.handle.net/10356/4046
_version_	1772828364558565376

Improvement in speed performance through transistor process optimization

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