Investigation of design techniques to reduce glitches for low power

• Main Author: Foo, Chee Yin.
• Other Authors: Jong, Ching Chuen
• Format: Theses and Dissertations
• Published: 2008
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Power electronics
• Online Access: http://hdl.handle.net/10356/4251
• Institution: Nanyang Technological University

This dissertation proposes and evaluates several glitch reduction techniques in the design of low power static CMOS circuits.