Design of high performance, low power latches and flip-flops

• المؤلف الرئيسي: Shridhar Mubaraq Mishra.
• مؤلفون آخرون: Yeo Kiat Seng
• التنسيق: Theses and Dissertations
• اللغة: English
• منشور في: 2011
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/42657

With the advent of hand-held computing devices that require functionality rivaling the desktop, Low Power, High Performance systems have become the norm rather than the exception. The clocking network with its 20-40% contribution to the overall power dissipation is becoming a major obstacle in imp...