Advanced planarization techniques for deep sub-micron applications

• المؤلف الرئيسي: Lim, Victor Seng Keong.
• مؤلفون آخرون: Goh, Wang Ling
• التنسيق: Theses and Dissertations
• منشور في: 2008
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/4685

In this work, the evolution of step height, film thickness and unformity, on both the STI test structures and SDRAM structure throughout the CMP process were characterized in detailed. Comparision made among the newly proposed scheme and the conventional processes such as Direct Polish (DP) Scheme a...