Measuring and characterizing sub-micron MOSFETs

In this thesis, a semi-empirical IDS - VDS model for sub-micron Lightly-Doped Drain (LDD) MOSFETs is proposed with an improvement in the strong inversion region. The proposed model is based on the principle of the conventional n-channel enhancement mode MOSFET by taking into consideration the variou...

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Bibliographic Details
Main Author:	Lin, Hong.
Other Authors:	Liu, Po Ching
Format:	Theses and Dissertations
Published:	2008
Subjects:	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Online Access:	http://hdl.handle.net/10356/4704
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Institution:	Nanyang Technological University

id	sg-ntu-dr.10356-4704
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spelling	sg-ntu-dr.10356-47042023-07-04T15:21:32Z Measuring and characterizing sub-micron MOSFETs Lin, Hong. Liu, Po Ching School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits In this thesis, a semi-empirical IDS - VDS model for sub-micron Lightly-Doped Drain (LDD) MOSFETs is proposed with an improvement in the strong inversion region. The proposed model is based on the principle of the conventional n-channel enhancement mode MOSFET by taking into consideration the various phenomena associated with the LDD structure for very short channel MOSFFET devices. The important short-channel device features: Drain-Induced-Barrier-Lowering (DIBL), Channel-Length Modulation (CLM), mobility degradation, velocity saturation, the source/drain parasitic resistance etc. have been considered in the proposed model. Master of Engineering 2008-09-17T09:56:59Z 2008-09-17T09:56:59Z 2000 2000 Thesis http://hdl.handle.net/10356/4704 Nanyang Technological University application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
topic	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits Lin, Hong. Measuring and characterizing sub-micron MOSFETs
description	In this thesis, a semi-empirical IDS - VDS model for sub-micron Lightly-Doped Drain (LDD) MOSFETs is proposed with an improvement in the strong inversion region. The proposed model is based on the principle of the conventional n-channel enhancement mode MOSFET by taking into consideration the various phenomena associated with the LDD structure for very short channel MOSFFET devices. The important short-channel device features: Drain-Induced-Barrier-Lowering (DIBL), Channel-Length Modulation (CLM), mobility degradation, velocity saturation, the source/drain parasitic resistance etc. have been considered in the proposed model.
author2	Liu, Po Ching
author_facet	Liu, Po Ching Lin, Hong.
format	Theses and Dissertations
author	Lin, Hong.
author_sort	Lin, Hong.
title	Measuring and characterizing sub-micron MOSFETs
title_short	Measuring and characterizing sub-micron MOSFETs
title_full	Measuring and characterizing sub-micron MOSFETs
title_fullStr	Measuring and characterizing sub-micron MOSFETs
title_full_unstemmed	Measuring and characterizing sub-micron MOSFETs
title_sort	measuring and characterizing sub-micron mosfets
publishDate	2008
url	http://hdl.handle.net/10356/4704
_version_	1772827390813143040

Measuring and characterizing sub-micron MOSFETs

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