Design of low voltage, 16kb 9T SRAM with hierarchical bitline and writeback block

Design of low voltage, 16kb 9T SRAM with hierarchical bitline and writeback block

Subthreshold circuits are increasingly popular especially in ultra-low power applications like wireless sensor, cell phone, and biomedical where minimal power consumption is a primary design constraint. Static Random Access Memory (SRAM) with wider supply voltage range is essential for achieving bet...

Full description

Saved in:
Bibliographic Details
Main Author: Li, Ricky Qi.
Other Authors: School of Electrical and Electronic Engineering
Format: Theses and Dissertations
Language:English
Published: 2013
Subjects:
DRNTU::Engineering::Electrical and electronic engineering
Online Access:http://hdl.handle.net/10356/53461
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-53461
record_format dspace
spelling sg-ntu-dr.10356-534612023-07-04T16:04:43Z Design of low voltage, 16kb 9T SRAM with hierarchical bitline and writeback block Li, Ricky Qi. School of Electrical and Electronic Engineering Tony Kim DRNTU::Engineering::Electrical and electronic engineering Subthreshold circuits are increasingly popular especially in ultra-low power applications like wireless sensor, cell phone, and biomedical where minimal power consumption is a primary design constraint. Static Random Access Memory (SRAM) with wider supply voltage range is essential for achieving better performance as well as minimizing power consumption in subthreshold region. Master of Science (Communications Engineering) 2013-06-04T02:55:58Z 2013-06-04T02:55:58Z 2011 2011 Thesis http://hdl.handle.net/10356/53461 en 71 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Li, Ricky Qi.
Design of low voltage, 16kb 9T SRAM with hierarchical bitline and writeback block
description Subthreshold circuits are increasingly popular especially in ultra-low power applications like wireless sensor, cell phone, and biomedical where minimal power consumption is a primary design constraint. Static Random Access Memory (SRAM) with wider supply voltage range is essential for achieving better performance as well as minimizing power consumption in subthreshold region.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Li, Ricky Qi.
format Theses and Dissertations
author Li, Ricky Qi.
author_sort Li, Ricky Qi.
title Design of low voltage, 16kb 9T SRAM with hierarchical bitline and writeback block
title_short Design of low voltage, 16kb 9T SRAM with hierarchical bitline and writeback block
title_full Design of low voltage, 16kb 9T SRAM with hierarchical bitline and writeback block
title_fullStr Design of low voltage, 16kb 9T SRAM with hierarchical bitline and writeback block
title_full_unstemmed Design of low voltage, 16kb 9T SRAM with hierarchical bitline and writeback block
title_sort design of low voltage, 16kb 9t sram with hierarchical bitline and writeback block
publishDate 2013
url http://hdl.handle.net/10356/53461
_version_ 1772825195218731008

Similar Items