Ferroelectric-gate carbon nanotube field effect transistor for non-volatile memory application
Carbon nanotube field effect transistor has attracted much attention and is a promising candidate for next generation nanoelectronics. Significant hysteresis usually exists in its transfer characteristics between the forward and reverse gate bias sweeps, which is problematic for application in logi...
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sg-ntu-dr.10356-556092023-03-04T16:35:37Z Ferroelectric-gate carbon nanotube field effect transistor for non-volatile memory application Cheah, Jason Jun Wei Wang Junling School of Materials Science & Engineering DRNTU::Engineering::Materials::Microelectronics and semiconductor materials Carbon nanotube field effect transistor has attracted much attention and is a promising candidate for next generation nanoelectronics. Significant hysteresis usually exists in its transfer characteristics between the forward and reverse gate bias sweeps, which is problematic for application in logic devices. This behavior is due to a charge injection process at the carbon nanotube-dielectric interface and has been suggested to serve for nonvolatile memory applications. However, the charge injection process is highly susceptible to environmental changes and has a large charge injection surface, in the range of a few um. In this project, we explore the possibility of using ferroelectric materials as the gate dielectric of a carbon nanotube network transistor. The spontaneous polarization of ferroelectric materials offers stability and controllability of the surface charge. Under ambient condition, a modulation of 3 orders of magnitude in the channel conductivity has been observed in the network-based transistor. Voltage pulses are used to control the transistor states; no continuous gate bias is needed. However, the observed hysteresis loop is attributed to the charge injection at the carbon nanotube-PbZr0.52Ti0.48O3 interface, similar to that observed in SiO2- gate carbon nanotube field effect transistors. Electrostatic force microscopy is conducted to verify the presence of the surface charges and a temperature dependent study is carried out to clarify the operation mechanism of the transistor. By keeping the devices in vacuum for a long time, it is possible to remove surface water layer which acts at charge traps. However, this procedure works well for SiO2-gate carbon nanotube field effect transistors but not for PbZr0.52Ti0.48-gate transistors. This is likely due to the different surface chemistry of the two materials. To resolve this issue, we have developed an encapsulation procedure, where the PbZr0.52Ti0.48O3-gate transistors are annealed at 200 oC for 1 hour, followed by keeping in vacuum for 2 hours and encapsulation by a thin layer of BaSrTiO3 film. A retarding hysteresis, resembling the polarization-electric Field hysteresis loop in both direction and coercive voltage, is observed. This is the true ferroelectric induced hysteresis, though the on/off ratio is much reduced. This is likely due to residual surface charge traps which act against the ferroelectric polarization in controlling the channel conductivity. Further optimization of the annealing and encapsulation process should be able to improve the device performance. The encapsulated transistors show excellent fatigue resistance and data retention property. No change in the transfer curve is observed after 105 cycles of switching of the ferroelectric gate. The on/off currents show no changes after at least 24 hours. Our results clearly demonstrate that it is possible to control the channel conductivity of carbon nanotube field effect transistors using ferroelectric materials as the gate dielectrics. Furthermore, the hysteresis is much more stable than that induced by surface injected charges. Such devices are promising for applications in nonvolatile memories. Doctor of Philosophy (MSE) 2014-03-17T12:46:39Z 2014-03-17T12:46:39Z 2014 2014 Thesis http://hdl.handle.net/10356/55609 en 86 p. application/pdf |
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DRNTU::Engineering::Materials::Microelectronics and semiconductor materials Cheah, Jason Jun Wei Ferroelectric-gate carbon nanotube field effect transistor for non-volatile memory application |
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Carbon nanotube field effect transistor has attracted much attention and is a promising candidate for next generation nanoelectronics. Significant hysteresis usually exists in its transfer characteristics between the forward and reverse gate bias sweeps, which is problematic for application in logic devices. This behavior is due to a charge injection process at the carbon nanotube-dielectric interface and has been suggested to serve for nonvolatile memory applications. However, the charge injection process is highly susceptible to environmental changes and has a large charge injection surface, in the range of a few um. In this project, we explore the possibility of using ferroelectric materials as the gate dielectric of a carbon nanotube network transistor. The spontaneous polarization of ferroelectric materials offers stability and controllability of the surface charge.
Under ambient condition, a modulation of 3 orders of magnitude in the channel conductivity has been observed in the network-based transistor. Voltage pulses are used to control the transistor states; no continuous gate bias is needed. However, the observed hysteresis loop is attributed to the charge injection at the carbon nanotube-PbZr0.52Ti0.48O3 interface, similar to that observed in SiO2- gate carbon nanotube field effect transistors. Electrostatic force microscopy is conducted to verify the presence of the surface charges and a temperature dependent study is carried out to clarify the operation mechanism of the transistor.
By keeping the devices in vacuum for a long time, it is possible to remove surface water layer which acts at charge traps. However, this procedure works well for SiO2-gate carbon nanotube field effect transistors but not for PbZr0.52Ti0.48-gate transistors. This is likely due to the different surface chemistry of the two materials. To resolve this issue, we have developed an encapsulation procedure, where the PbZr0.52Ti0.48O3-gate transistors are annealed at 200 oC for 1 hour, followed by keeping in vacuum for 2 hours and encapsulation by a thin layer of BaSrTiO3 film. A retarding hysteresis, resembling the polarization-electric Field hysteresis loop in both direction and coercive voltage, is observed. This is the true ferroelectric induced hysteresis, though the on/off ratio is much reduced. This is likely due to residual surface charge traps which act against the ferroelectric polarization in controlling the channel conductivity. Further optimization of the annealing and encapsulation process should be able to improve the device performance.
The encapsulated transistors show excellent fatigue resistance and data retention property. No change in the transfer curve is observed after 105 cycles of switching of the ferroelectric gate. The on/off currents show no changes after at least 24 hours. Our results clearly demonstrate that it is possible to control the channel conductivity of carbon nanotube field effect transistors using ferroelectric materials as the gate dielectrics. Furthermore, the hysteresis is much more stable than that induced by surface injected charges. Such devices are promising for applications in nonvolatile memories. |
author2 |
Wang Junling |
author_facet |
Wang Junling Cheah, Jason Jun Wei |
format |
Theses and Dissertations |
author |
Cheah, Jason Jun Wei |
author_sort |
Cheah, Jason Jun Wei |
title |
Ferroelectric-gate carbon nanotube field effect transistor for non-volatile memory application |
title_short |
Ferroelectric-gate carbon nanotube field effect transistor for non-volatile memory application |
title_full |
Ferroelectric-gate carbon nanotube field effect transistor for non-volatile memory application |
title_fullStr |
Ferroelectric-gate carbon nanotube field effect transistor for non-volatile memory application |
title_full_unstemmed |
Ferroelectric-gate carbon nanotube field effect transistor for non-volatile memory application |
title_sort |
ferroelectric-gate carbon nanotube field effect transistor for non-volatile memory application |
publishDate |
2014 |
url |
http://hdl.handle.net/10356/55609 |
_version_ |
1759855168411664384 |