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Networks on chip for FPGAs

Reducing worst case routing latencies while delivering high throughput and low energy are key design concerns in the engineering of overlay packet-switched NoCs for FPGA fabrics. Deflection Torus (Hoplite), an efficient, remarkably lightweight, fast FPGA overlay NoC that is designed to be small and...

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書目詳細資料
主要作者: Agarwal, Shubham
其他作者: Nachiket Kapre
格式: Final Year Project
語言:English
出版: 2016
主題:
在線閱讀:http://hdl.handle.net/10356/66694
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機構: Nanyang Technological University
語言: English