Networks on chip for FPGAs
Reducing worst case routing latencies while delivering high throughput and low energy are key design concerns in the engineering of overlay packet-switched NoCs for FPGA fabrics. Deflection Torus (Hoplite), an efficient, remarkably lightweight, fast FPGA overlay NoC that is designed to be small and...
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| Format: | Final Year Project |
| Language: | English |
| Published: |
2016
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| Online Access: | http://hdl.handle.net/10356/66694 |
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| Institution: | Nanyang Technological University |
| Language: | English |