Ultra-low voltage SRAM design
Static Random Access Memory or SRAM, is the most common embedded memory option for Integrated Circuits. With the scaling of supply voltage to close to sub threshold regions, it must still remain operable such that they can still work in ultra-low power battery operated systems. However, the basic...
Saved in:
Main Author: | |
---|---|
Other Authors: | |
Format: | Final Year Project |
Language: | English |
Published: |
2017
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/70808 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
id |
sg-ntu-dr.10356-70808 |
---|---|
record_format |
dspace |
spelling |
sg-ntu-dr.10356-708082023-07-07T16:16:18Z Ultra-low voltage SRAM design Zhou, Jay Yun Jie Kim Tae Hyoung School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering Static Random Access Memory or SRAM, is the most common embedded memory option for Integrated Circuits. With the scaling of supply voltage to close to sub threshold regions, it must still remain operable such that they can still work in ultra-low power battery operated systems. However, the basic operations of a SRAM such as read and write are hugely affected as the supply voltage scales down. This paper aim to present the basics and fundamentals of SRAM such as its operations and performance parameters. Two existing conventional SRAM cell topologies are chosen, namely the 6T SRAM and 8T SRAM cell topology. The performance parameters for these two topologies are simulated and compared with respect to different supply voltages. A 1kb SRAM is also designed using the two existing SRAM cell topologies to learn how the SRAM array operates. All the drawings and simulations are done using electronic design automation tools such as Cadence Virtuoso and STM 65nm CMOS process technology library cells are used for all the simulations. Bachelor of Engineering 2017-05-11T07:15:11Z 2017-05-11T07:15:11Z 2017 Final Year Project (FYP) http://hdl.handle.net/10356/70808 en Nanyang Technological University 75 p. application/pdf |
institution |
Nanyang Technological University |
building |
NTU Library |
continent |
Asia |
country |
Singapore Singapore |
content_provider |
NTU Library |
collection |
DR-NTU |
language |
English |
topic |
DRNTU::Engineering::Electrical and electronic engineering |
spellingShingle |
DRNTU::Engineering::Electrical and electronic engineering Zhou, Jay Yun Jie Ultra-low voltage SRAM design |
description |
Static Random Access Memory or SRAM, is the most common embedded memory option for
Integrated Circuits. With the scaling of supply voltage to close to sub threshold regions, it
must still remain operable such that they can still work in ultra-low power battery operated
systems. However, the basic operations of a SRAM such as read and write are hugely
affected as the supply voltage scales down.
This paper aim to present the basics and fundamentals of SRAM such as its operations and
performance parameters. Two existing conventional SRAM cell topologies are chosen,
namely the 6T SRAM and 8T SRAM cell topology. The performance parameters for these
two topologies are simulated and compared with respect to different supply voltages. A 1kb
SRAM is also designed using the two existing SRAM cell topologies to learn how the SRAM
array operates.
All the drawings and simulations are done using electronic design automation tools such as
Cadence Virtuoso and STM 65nm CMOS process technology library cells are used for all the
simulations. |
author2 |
Kim Tae Hyoung |
author_facet |
Kim Tae Hyoung Zhou, Jay Yun Jie |
format |
Final Year Project |
author |
Zhou, Jay Yun Jie |
author_sort |
Zhou, Jay Yun Jie |
title |
Ultra-low voltage SRAM design |
title_short |
Ultra-low voltage SRAM design |
title_full |
Ultra-low voltage SRAM design |
title_fullStr |
Ultra-low voltage SRAM design |
title_full_unstemmed |
Ultra-low voltage SRAM design |
title_sort |
ultra-low voltage sram design |
publishDate |
2017 |
url |
http://hdl.handle.net/10356/70808 |
_version_ |
1772825504234078208 |