Heterogeneous dataflow architectures for FPGA-based sparse LU factorization

FPGA-based token dataflow architectures with heterogeneous computation and communication subsystems can accelerate hard-to-parallelize, irregular computations in sparse LU factorization. We combine software pre-processing and architecture customization to fully expose and exploit the underlying hete...

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Bibliographic Details
Main Authors: Siddhartha, Kapre, Nachiket
Other Authors: School of Computer Engineering
Format: Conference or Workshop Item
Language:English
Published: 2015
Subjects:
Online Access:https://hdl.handle.net/10356/81188
http://hdl.handle.net/10220/39175
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Institution: Nanyang Technological University
Language: English