Heterogeneous dataflow architectures for FPGA-based sparse LU factorization

• Main Authors: Siddhartha, Kapre, Nachiket
• Other Authors: School of Computer Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2015
• Subjects: Computer Science and Engineering
• Online Access: https://hdl.handle.net/10356/81188; http://hdl.handle.net/10220/39175
• Institution: Nanyang Technological University

FPGA-based token dataflow architectures with heterogeneous computation and communication subsystems can accelerate hard-to-parallelize, irregular computations in sparse LU factorization. We combine software pre-processing and architecture customization to fully expose and exploit the underlying hete...