Heterogeneous dataflow architectures for FPGA-based sparse LU factorization

• المؤلفون الرئيسيون: Siddhartha, Kapre, Nachiket
• مؤلفون آخرون: School of Computer Engineering
• التنسيق: Conference or Workshop Item
• اللغة: English
• منشور في: 2015
• الموضوعات: Computer Science and Engineering
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/81188; http://hdl.handle.net/10220/39175
• المؤسسة: Nanyang Technological University

FPGA-based token dataflow architectures with heterogeneous computation and communication subsystems can accelerate hard-to-parallelize, irregular computations in sparse LU factorization. We combine software pre-processing and architecture customization to fully expose and exploit the underlying hete...