SPICE2: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA

Spatial processing of sparse, irregular, double-precision floating-point computation using a single field-programmable gate array (FPGA) enables up to an order of magnitude speedup (mean 2.8× speedup) over a conventional microprocessor for the SPICE circuit simulator. We develop a parallel, FPGA-bas...

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Bibliographic Details
Main Authors: Kapre, Nachiket, DeHon, André
Other Authors: School of Computer Engineering
Format: Article
Language:English
Published: 2015
Subjects:
Online Access:https://hdl.handle.net/10356/81197
http://hdl.handle.net/10220/39201
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Institution: Nanyang Technological University
Language: English
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