SPICE2: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA
Spatial processing of sparse, irregular, double-precision floating-point computation using a single field-programmable gate array (FPGA) enables up to an order of magnitude speedup (mean 2.8× speedup) over a conventional microprocessor for the SPICE circuit simulator. We develop a parallel, FPGA-bas...
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| 格式: | Article |
| 語言: | English |
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2015
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| 在線閱讀: | https://hdl.handle.net/10356/81197 http://hdl.handle.net/10220/39201 |
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