Ultra-Low Power Read-Decoupled SRAMs with Ultra-Low Write-Bitline Voltage Swing
We propose an ultra-low power memory design method based on the ultra-low (∼ 0.2 V) write-bitline voltage swing to reduce the write power dissipation for read-decoupled SRAM (RD-SRAM) cells. By keeping the write bitlines at ground level (0 V) during standby and charging them to a low voltage V L (...
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Main Authors: | , , |
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Other Authors: | |
Format: | Article |
Language: | English |
Published: |
2016
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/82378 http://hdl.handle.net/10220/39987 |
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Institution: | Nanyang Technological University |
Language: | English |
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