Integration of GaAs, GaN, and Si-CMOS on a common 200 mm Si substrate through multilayer transfer process
The integration of III–V semiconductors (e.g., GaAs and GaN) and silicon-on-insulator (SOI)-CMOS on a 200 mm Si substrate is demonstrated. The SOI-CMOS donor wafer is temporarily bonded on a Si handle wafer and thinned down. A second GaAs/Ge/Si substrate is then bonded to the SOI-CMOS-containing han...
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Main Authors: | , , , , , |
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Other Authors: | |
Format: | Article |
Language: | English |
Published: |
2017
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/82889 http://hdl.handle.net/10220/42320 |
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Institution: | Nanyang Technological University |
Language: | English |
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