Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils
Low resistance is an important requirement for microcoils which act as a signal receiver to ensure low thermal noise during signal detection. High-aspect ratio (HAR) planar microcoils entrenched in blind silicon trenches have features that make them more attractive than their traditional counterpart...
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sg-ntu-dr.10356-875382020-03-07T13:57:31Z Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils Puiu, Poenar Daniel Aditya, Sheel Zishan Ali Syed Mohammed School of Electrical and Electronic Engineering Nanoelectronics Centre of Excellence Microcoil Copper Electroplating Low resistance is an important requirement for microcoils which act as a signal receiver to ensure low thermal noise during signal detection. High-aspect ratio (HAR) planar microcoils entrenched in blind silicon trenches have features that make them more attractive than their traditional counterparts employing electroplating through a patterned thick polymer or achieved through silicon vias. However, challenges met in fabrication of such coils have not been discussed in detail until now. This paper reports the realization of such HAR microcoils embedded in Si blind trenches, fabricated with a single lithography step by first etching blind trenches in the silicon substrate with an aspect ratio of almost 3∶1 and then filling them up using copper electroplating. The electroplating was followed by chemical wet etching as a faster way of removing excess copper than traditional chemical mechanical polishing. Electrical resistance was further reduced by annealing the microcoils. The process steps and challenges faced in the realization of such structures are reported here followed by their electrical characterization. The obtained electrical resistances are then compared with those of other similar microcoils embedded in blind vias. MOE (Min. of Education, S’pore) Published version 2018-08-02T07:46:48Z 2019-12-06T16:44:04Z 2018-08-02T07:46:48Z 2019-12-06T16:44:04Z 2018 Journal Article Zishan Ali Syed Mohammed, Puiu, P. D., & Aditya, S. (2018). Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils. Journal of Micro/Nanolithography, MEMS, and MOEMS, 17(1), 014501-. 1932-5150 https://hdl.handle.net/10356/87538 http://hdl.handle.net/10220/45437 10.1117/1.JMM.17.1.014501 en Journal of Micro/Nanolithography, MEMS, and MOEMS © 2018 Society of Photo-Optical Instrumentation Engineers (SPIE). This paper was published in Journal of Micro/Nanolithography, MEMS, and MOEMS and is made available as an electronic reprint (preprint) with permission of Society of Photo-Optical Instrumentation Engineers (SPIE). The published version is available at: [http://dx.doi.org/10.1117/1.JMM.17.1.014501]. One print or electronic copy may be made for personal use only. Systematic or multiple reproduction, distribution to multiple locations via electronic or other means, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper is prohibited and is subject to penalties under law. 12 p. application/pdf |
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Microcoil Copper Electroplating Puiu, Poenar Daniel Aditya, Sheel Zishan Ali Syed Mohammed Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils |
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Low resistance is an important requirement for microcoils which act as a signal receiver to ensure low thermal noise during signal detection. High-aspect ratio (HAR) planar microcoils entrenched in blind silicon trenches have features that make them more attractive than their traditional counterparts employing electroplating through a patterned thick polymer or achieved through silicon vias. However, challenges met in fabrication of such coils have not been discussed in detail until now. This paper reports the realization of such HAR microcoils embedded in Si blind trenches, fabricated with a single lithography step by first etching blind trenches in the silicon substrate with an aspect ratio of almost 3∶1 and then filling them up using copper electroplating. The electroplating was followed by chemical wet etching as a faster way of removing excess copper than traditional chemical mechanical polishing. Electrical resistance was further reduced by annealing the microcoils. The process steps and challenges faced in the realization of such structures are reported here followed by their electrical characterization. The obtained electrical resistances are then compared with those of other similar microcoils embedded in blind vias. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Puiu, Poenar Daniel Aditya, Sheel Zishan Ali Syed Mohammed |
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Article |
author |
Puiu, Poenar Daniel Aditya, Sheel Zishan Ali Syed Mohammed |
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Puiu, Poenar Daniel |
title |
Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils |
title_short |
Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils |
title_full |
Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils |
title_fullStr |
Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils |
title_full_unstemmed |
Fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils |
title_sort |
fabrication of silicon-embedded low resistance high-aspect ratio planar copper microcoils |
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2018 |
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https://hdl.handle.net/10356/87538 http://hdl.handle.net/10220/45437 |
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1681038774828531712 |