Concurrent error detection in bit-serial normal basis multiplication over GF(2^m) using multiple parity prediction schemes

Concurrent error detection in bit-serial normal basis multiplication over GF(2^m) using multiple parity prediction schemes

New bit-serial architectures with concurrent error detection capability are presented to detect erroneous outputs in bit-serial normal basis multipliers over GF(2^m) using single and multiple-parity prediction schemes. It is shown that different types of normal basis multipliers could be realized by...

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Bibliographic Details
Main Authors: Lee, Chiou Yng, Meher, Pramod Kumar, Patra, Jagdish Chandra
Other Authors: School of Computer Engineering
Format: Article
Language:English
Published: 2011
Subjects:
DRNTU::Engineering::Computer science and engineering::Computer systems organization::Computer-communication networks
Online Access:https://hdl.handle.net/10356/94346
http://hdl.handle.net/10220/7120
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Institution: Nanyang Technological University
Language: English
Description
Summary:New bit-serial architectures with concurrent error detection capability are presented to detect erroneous outputs in bit-serial normal basis multipliers over GF(2^m) using single and multiple-parity prediction schemes. It is shown that different types of normal basis multipliers could be realized by similar architectures. The proposed architectures can detect errors with nearly 100% probability.

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