Exploiting FPGA-aware merging of custom instructions for runtime reconfiguration

Exploiting FPGA-aware merging of custom instructions for runtime reconfiguration

Runtime reconfiguration is a promising solution for reducing hardware cost in embedded systems, without compromising on performance. We present a framework that aims to increase the advantages of runtime reconfiguration on reconfigurable processors that support full or partial runtime reconfiguratio...

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書目詳細資料
Main Authors:	Lam, Siew-Kei, Srikanthan, Thambipillai, Clarke, Christopher T.
其他作者:	School of Computer Engineering
格式:	Conference or Workshop Item
語言:	English
出版:	2013
主題:	DRNTU::Engineering::Computer science and engineering
在線閱讀:	https://hdl.handle.net/10356/97946 http://hdl.handle.net/10220/12235
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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