Scalable linear array architectures for matrix inversion using Bi-z CORDIC

In this paper, VLSI array architectures for matrix inversion are studied. A new binary-coded z-path (Bi-z) CORDIC is developed and implemented to compute the operations required in the matrix inversion using the Givens rotation (GR) based QR decomposition. The Bi-z CORDIC allows both the GR vectorin...

Full description

Saved in:
Bibliographic Details
Main Authors: Luo, J. W., Jong, Ching Chuen
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2013
Subjects:
Online Access:https://hdl.handle.net/10356/98429
http://hdl.handle.net/10220/11150
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English

Similar Items