Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors

Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors

The electret induced hysteresis was studied in sol-gel silica films that result in higher drain currents and improved device performance in pentacene field-effect transistors. Vacuum and ambient condition studies of the hysteresis behavior and capacitance-voltage characteristics on si...

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Main Authors: Cahyadi, Tommy, Tan, H. S., Mhaisalkar, Subodh Gautam, Lee, Pooi See, Boey, Freddy Yin Chiang, Chen, Z. K., Ng, C. M., Rao, V. R., Qi, Guojun
其他作者: School of Materials Science & Engineering
格式: Article
語言:English
出版: 2012
主題:
DRNTU::Engineering::Materials
在線閱讀:https://hdl.handle.net/10356/98488
http://hdl.handle.net/10220/8063
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總結:The electret induced hysteresis was studied in sol-gel silica films that result in higher drain currents and improved device performance in pentacene field-effect transistors. Vacuum and ambient condition studies of the hysteresis behavior and capacitance-voltage characteristics on single layer and varying thicknesses of bilayer dielectrics confirmed that blocking layers of thermal oxide could effectively eliminate the electret induced hysteresis, and that thin (25 nm) sol-gel silica dielectrics enabled elimination of nanopores thus realizing stable device characteristics under ambient conditions.

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