Metal gate with high-K dielectric in Si CMOS processing

Ph.D

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Main Author: PARK CHANG SEO
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Theses and Dissertations
Language:English
Published: 2010
Subjects:
Online Access:http://scholarbank.nus.edu.sg/handle/10635/15210
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Institution: National University of Singapore
Language: English
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spelling sg-nus-scholar.10635-152102017-10-21T09:58:53Z Metal gate with high-K dielectric in Si CMOS processing PARK CHANG SEO ELECTRICAL & COMPUTER ENGINEERING CHO BYUNG-JIN metal gate, high-K, work function, integration, CMOS, FUSI Ph.D DOCTOR OF PHILOSOPHY 2010-04-08T10:51:08Z 2010-04-08T10:51:08Z 2006-04-24 Thesis PARK CHANG SEO (2006-04-24). Metal gate with high-K dielectric in Si CMOS processing. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/15210 NOT_IN_WOS en
institution National University of Singapore
building NUS Library
country Singapore
collection ScholarBank@NUS
language English
topic metal gate, high-K, work function, integration, CMOS, FUSI
spellingShingle metal gate, high-K, work function, integration, CMOS, FUSI
PARK CHANG SEO
Metal gate with high-K dielectric in Si CMOS processing
description Ph.D
author2 ELECTRICAL & COMPUTER ENGINEERING
author_facet ELECTRICAL & COMPUTER ENGINEERING
PARK CHANG SEO
format Theses and Dissertations
author PARK CHANG SEO
author_sort PARK CHANG SEO
title Metal gate with high-K dielectric in Si CMOS processing
title_short Metal gate with high-K dielectric in Si CMOS processing
title_full Metal gate with high-K dielectric in Si CMOS processing
title_fullStr Metal gate with high-K dielectric in Si CMOS processing
title_full_unstemmed Metal gate with high-K dielectric in Si CMOS processing
title_sort metal gate with high-k dielectric in si cmos processing
publishDate 2010
url http://scholarbank.nus.edu.sg/handle/10635/15210
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