Metal gate with high-K dielectric in Si CMOS processing
Ph.D
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sg-nus-scholar.10635-152102017-10-21T09:58:53Z Metal gate with high-K dielectric in Si CMOS processing PARK CHANG SEO ELECTRICAL & COMPUTER ENGINEERING CHO BYUNG-JIN metal gate, high-K, work function, integration, CMOS, FUSI Ph.D DOCTOR OF PHILOSOPHY 2010-04-08T10:51:08Z 2010-04-08T10:51:08Z 2006-04-24 Thesis PARK CHANG SEO (2006-04-24). Metal gate with high-K dielectric in Si CMOS processing. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/15210 NOT_IN_WOS en |
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metal gate, high-K, work function, integration, CMOS, FUSI |
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metal gate, high-K, work function, integration, CMOS, FUSI PARK CHANG SEO Metal gate with high-K dielectric in Si CMOS processing |
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Ph.D |
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ELECTRICAL & COMPUTER ENGINEERING |
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ELECTRICAL & COMPUTER ENGINEERING PARK CHANG SEO |
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Theses and Dissertations |
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PARK CHANG SEO |
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Metal gate with high-K dielectric in Si CMOS processing |
title_short |
Metal gate with high-K dielectric in Si CMOS processing |
title_full |
Metal gate with high-K dielectric in Si CMOS processing |
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Metal gate with high-K dielectric in Si CMOS processing |
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Metal gate with high-K dielectric in Si CMOS processing |
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metal gate with high-k dielectric in si cmos processing |
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2010 |
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http://scholarbank.nus.edu.sg/handle/10635/15210 |
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