Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages

Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages

Master's

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Bibliographic Details
Main Author: DENG CHUN
Other Authors: MECHANICAL ENGINEERING
Format: Theses and Dissertations
Language:English
Published: 2011
Subjects:
Interposer, Nano Wafer-level Package (NWLP), Known Good Die, Probe Card, Silicon Processing, Test and Burn-in
Online Access:https://scholarbank.nus.edu.sg/handle/10635/27721
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Institution: National University of Singapore
Language: English

Internet

https://scholarbank.nus.edu.sg/handle/10635/27721

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