A novel test strategy for fine pitch wafer-level packaged devices

A novel test strategy for fine pitch wafer-level packaged devices

10.1109/TADVP.2007.898617

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Bibliographic Details
Main Authors: Jayabalan, J., Rotaru, M.D., Rao, V.S., Kripesh, V., Iyer, M.K., Tay, A.A.O., Ooi, B.-L., Leong, M.-S.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Article
Published: 2014
Subjects:
Coplanar probe
ELastomer mesh substrate
Multigigahertz test
Wafer-level package test and characterization
Online Access:http://scholarbank.nus.edu.sg/handle/10635/54653
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Institution: National University of Singapore

Internet

http://scholarbank.nus.edu.sg/handle/10635/54653

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