Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages

Master's

Saved in:

Bibliographic Details
Main Author:	DENG CHUN
Other Authors:	MECHANICAL ENGINEERING
Format:	Theses and Dissertations
Language:	English
Published:	2011
Subjects:	Interposer, Nano Wafer-level Package (NWLP), Known Good Die, Probe Card, Silicon Processing, Test and Burn-in
Online Access:	https://scholarbank.nus.edu.sg/handle/10635/27721
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	National University of Singapore
Language:	English

id	sg-nus-scholar.10635-27721
record_format	dspace
spelling	sg-nus-scholar.10635-277212024-10-25T16:34:41Z Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages DENG CHUN MECHANICAL ENGINEERING ANG, SIMON SAW-TEONG TAY AH ONG, ANDREW Interposer, Nano Wafer-level Package (NWLP), Known Good Die, Probe Card, Silicon Processing, Test and Burn-in Master's MASTER OF ENGINEERING 2011-10-12T18:01:47Z 2011-10-12T18:01:47Z 2004-08-20 Thesis DENG CHUN (2004-08-20). Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages. ScholarBank@NUS Repository. https://scholarbank.nus.edu.sg/handle/10635/27721 NOT_IN_WOS en
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
language	English
topic	Interposer, Nano Wafer-level Package (NWLP), Known Good Die, Probe Card, Silicon Processing, Test and Burn-in
spellingShingle	Interposer, Nano Wafer-level Package (NWLP), Known Good Die, Probe Card, Silicon Processing, Test and Burn-in DENG CHUN Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages
description	Master's
author2	MECHANICAL ENGINEERING
author_facet	MECHANICAL ENGINEERING DENG CHUN
format	Theses and Dissertations
author	DENG CHUN
author_sort	DENG CHUN
title	Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages
title_short	Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages
title_full	Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages
title_fullStr	Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages
title_full_unstemmed	Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages
title_sort	simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages
publishDate	2011
url	https://scholarbank.nus.edu.sg/handle/10635/27721
_version_	1821215736121524224

Simulation and fabrication of an interposer for electrical testing of fine-pitch wafer-level packages

Similar Items