Ultra-low sheet resistance metal/poly-si gate for deep sub-micron CMOS application

• Main Authors: LIM, CHONG WEE, PEY, KIN LEONG, SIAH, SOH YUN, LIM, ENG HWA, CHAN, LAP
• Other Authors: ELECTRICAL & COMPUTER ENGINEERING
• Format: Patent
• Published: 2012
• Online Access: http://scholarbank.nus.edu.sg/handle/10635/32578
• Institution: National University of Singapore

US6093628