A new modeling technique for mixed-mode simulation of CMOS circuits
Integration, the VLSI Journal
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sg-nus-scholar.10635-545312015-02-17T07:39:37Z A new modeling technique for mixed-mode simulation of CMOS circuits Samudra, G. Lee, T.K. ELECTRICAL ENGINEERING Mixed mode simulation MOS conductance model MOS device conductance Simulation Integration, the VLSI Journal 22 1-2 87-99 IVJOD 2014-06-16T09:32:07Z 2014-06-16T09:32:07Z 1997-08 Article Samudra, G.,Lee, T.K. (1997-08). A new modeling technique for mixed-mode simulation of CMOS circuits. Integration, the VLSI Journal 22 (1-2) : 87-99. ScholarBank@NUS Repository. 01679260 http://scholarbank.nus.edu.sg/handle/10635/54531 NOT_IN_WOS Scopus |
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Mixed mode simulation MOS conductance model MOS device conductance Simulation |
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Mixed mode simulation MOS conductance model MOS device conductance Simulation Samudra, G. Lee, T.K. A new modeling technique for mixed-mode simulation of CMOS circuits |
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Integration, the VLSI Journal |
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ELECTRICAL ENGINEERING |
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ELECTRICAL ENGINEERING Samudra, G. Lee, T.K. |
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Article |
author |
Samudra, G. Lee, T.K. |
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Samudra, G. |
title |
A new modeling technique for mixed-mode simulation of CMOS circuits |
title_short |
A new modeling technique for mixed-mode simulation of CMOS circuits |
title_full |
A new modeling technique for mixed-mode simulation of CMOS circuits |
title_fullStr |
A new modeling technique for mixed-mode simulation of CMOS circuits |
title_full_unstemmed |
A new modeling technique for mixed-mode simulation of CMOS circuits |
title_sort |
new modeling technique for mixed-mode simulation of cmos circuits |
publishDate |
2014 |
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http://scholarbank.nus.edu.sg/handle/10635/54531 |
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1681084331422908416 |