TRISHUL: A single-pass optimal two-level inclusive data cache hierarchy selection process for real-time MPSoCs
10.1109/ASPDAC.2013.6509615
Saved in:
Main Authors: | Haque, M.S., Kumar, A., Ha, Y., Wu, Q., Luo, S. |
---|---|
Other Authors: | ELECTRICAL & COMPUTER ENGINEERING |
Format: | Conference or Workshop Item |
Published: |
2014
|
Online Access: | http://scholarbank.nus.edu.sg/handle/10635/72088 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | National University of Singapore |
Similar Items
-
Techniques for Crafting Customizable MPSoCS
by: CHEN LIANG
Published: (2014) -
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs
by: Singh, Amit Kumar, et al.
Published: (2013) -
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs
by: Singh, A.K., et al.
Published: (2014) -
Energy-aware synthesis of application specific MPSoCs
by: Muthukaruppan, T.S., et al.
Published: (2014) -
Execution trace-driven energy-reliability optimization for multimedia MPSoCs
by: Das Anup, et al.
Published: (2016)