DC voltage-voltage method to measure the interface traps in sub-micron MOSTs

• Main Authors: Jie, B.B., Li, M.F., Chim, W.K., Chan, D.S.H., Lo, K.F.
• Other Authors: ELECTRICAL ENGINEERING
• Format: Article
• Published: 2014
• Online Access: http://scholarbank.nus.edu.sg/handle/10635/80344
• Institution: National University of Singapore

10.1088/0268-1242/14/7/306