Modelling of the "Gated-diode" configuration in bulk MOSFET's

2000 International Conference on Modeling and Simulation of Microsystems - MSM 2000

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Bibliographic Details
Main Authors: Yip, A., Yeow, Y.T., Samudra, G.S., Ling, C.H.
Other Authors: ELECTRICAL ENGINEERING
Format: Conference or Workshop Item
Published: 2014
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Online Access:http://scholarbank.nus.edu.sg/handle/10635/81548
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-815482015-01-12T00:11:39Z Modelling of the "Gated-diode" configuration in bulk MOSFET's Yip, A. Yeow, Y.T. Samudra, G.S. Ling, C.H. ELECTRICAL ENGINEERING Gated-diode Hot-carrier effects Interface traps MOSFET Simulation 2000 International Conference on Modeling and Simulation of Microsystems - MSM 2000 360-363 2014-10-07T03:09:29Z 2014-10-07T03:09:29Z 2000 Conference Paper Yip, A.,Yeow, Y.T.,Samudra, G.S.,Ling, C.H. (2000). Modelling of the "Gated-diode" configuration in bulk MOSFET's. 2000 International Conference on Modeling and Simulation of Microsystems - MSM 2000 : 360-363. ScholarBank@NUS Repository. 0966613570 http://scholarbank.nus.edu.sg/handle/10635/81548 NOT_IN_WOS Scopus
institution National University of Singapore
building NUS Library
country Singapore
collection ScholarBank@NUS
topic Gated-diode
Hot-carrier effects
Interface traps
MOSFET
Simulation
spellingShingle Gated-diode
Hot-carrier effects
Interface traps
MOSFET
Simulation
Yip, A.
Yeow, Y.T.
Samudra, G.S.
Ling, C.H.
Modelling of the "Gated-diode" configuration in bulk MOSFET's
description 2000 International Conference on Modeling and Simulation of Microsystems - MSM 2000
author2 ELECTRICAL ENGINEERING
author_facet ELECTRICAL ENGINEERING
Yip, A.
Yeow, Y.T.
Samudra, G.S.
Ling, C.H.
format Conference or Workshop Item
author Yip, A.
Yeow, Y.T.
Samudra, G.S.
Ling, C.H.
author_sort Yip, A.
title Modelling of the "Gated-diode" configuration in bulk MOSFET's
title_short Modelling of the "Gated-diode" configuration in bulk MOSFET's
title_full Modelling of the "Gated-diode" configuration in bulk MOSFET's
title_fullStr Modelling of the "Gated-diode" configuration in bulk MOSFET's
title_full_unstemmed Modelling of the "Gated-diode" configuration in bulk MOSFET's
title_sort modelling of the "gated-diode" configuration in bulk mosfet's
publishDate 2014
url http://scholarbank.nus.edu.sg/handle/10635/81548
_version_ 1681089091342434304