Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices

Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices

International Journal of Electronics

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Bibliographic Details
Main Authors: Samudra, G., Rajendran, K.
Other Authors: ELECTRICAL ENGINEERING
Format: Review
Published: 2014
Online Access:http://scholarbank.nus.edu.sg/handle/10635/81815
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Institution: National University of Singapore
Description
Summary:International Journal of Electronics

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