Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices

International Journal of Electronics

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Main Authors: Samudra, G., Rajendran, K.
Other Authors: ELECTRICAL ENGINEERING
Format: Review
Published: 2014
Online Access:http://scholarbank.nus.edu.sg/handle/10635/81815
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-818152015-01-27T18:07:57Z Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices Samudra, G. Rajendran, K. ELECTRICAL ENGINEERING International Journal of Electronics 87 5 513-530 IJELA 2014-10-07T03:12:20Z 2014-10-07T03:12:20Z 2000-05 Review Samudra, G.,Rajendran, K. (2000-05). Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices. International Journal of Electronics 87 (5) : 513-530. ScholarBank@NUS Repository. 00207217 http://scholarbank.nus.edu.sg/handle/10635/81815 NOT_IN_WOS Scopus
institution National University of Singapore
building NUS Library
country Singapore
collection ScholarBank@NUS
description International Journal of Electronics
author2 ELECTRICAL ENGINEERING
author_facet ELECTRICAL ENGINEERING
Samudra, G.
Rajendran, K.
format Review
author Samudra, G.
Rajendran, K.
spellingShingle Samudra, G.
Rajendran, K.
Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices
author_sort Samudra, G.
title Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices
title_short Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices
title_full Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices
title_fullStr Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices
title_full_unstemmed Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices
title_sort comparative analysis of minimum surface potential and location of barrier peaks in various si mosfet devices
publishDate 2014
url http://scholarbank.nus.edu.sg/handle/10635/81815
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