An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer

10.1109/LED.2003.812548

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Bibliographic Details
Main Authors:	Park, C.S., Cho, B.J., Kwong, D.-L.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Article
Published:	2014
Subjects:	Aluminum nitride CMOS Dual metal gates Workfunction
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/81953
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-81953
record_format	dspace
spelling	sg-nus-scholar.10635-819532023-10-29T22:28:50Z An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer Park, C.S. Cho, B.J. Kwong, D.-L. ELECTRICAL & COMPUTER ENGINEERING Aluminum nitride CMOS Dual metal gates Workfunction 10.1109/LED.2003.812548 IEEE Electron Device Letters 24 5 298-300 EDLED 2014-10-07T04:23:38Z 2014-10-07T04:23:38Z 2003-05 Article Park, C.S., Cho, B.J., Kwong, D.-L. (2003-05). An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer. IEEE Electron Device Letters 24 (5) : 298-300. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2003.812548 07413106 http://scholarbank.nus.edu.sg/handle/10635/81953 000184064600004 Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
topic	Aluminum nitride CMOS Dual metal gates Workfunction
spellingShingle	Aluminum nitride CMOS Dual metal gates Workfunction Park, C.S. Cho, B.J. Kwong, D.-L. An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer
description	10.1109/LED.2003.812548
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Park, C.S. Cho, B.J. Kwong, D.-L.
format	Article
author	Park, C.S. Cho, B.J. Kwong, D.-L.
author_sort	Park, C.S.
title	An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer
title_short	An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer
title_full	An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer
title_fullStr	An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer
title_full_unstemmed	An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer
title_sort	integratable dual metal gate cmos process using an ultrathin aluminum nitride buffer layer
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/81953
_version_	1781784025047760896

An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer

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