Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer

10.1109/TED.2007.904396

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Bibliographic Details
Main Authors:	Wang, Y.Q., Hwang, W.S., Zhang, G., Samudra, G., Yeo, Y.-C., Yoo, W.J.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Article
Published:	2014
Subjects:	Dual tunneling layer (DTL) Endurance High-k trapping layer Program/erase speed Retention
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/82246
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-82246
record_format	dspace
spelling	sg-nus-scholar.10635-822462023-10-30T22:33:20Z Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer Wang, Y.Q. Hwang, W.S. Zhang, G. Samudra, G. Yeo, Y.-C. Yoo, W.J. ELECTRICAL & COMPUTER ENGINEERING Dual tunneling layer (DTL) Endurance High-k trapping layer Program/erase speed Retention 10.1109/TED.2007.904396 IEEE Transactions on Electron Devices 54 10 2699-2705 IETDA 2014-10-07T04:27:06Z 2014-10-07T04:27:06Z 2007-10 Article Wang, Y.Q., Hwang, W.S., Zhang, G., Samudra, G., Yeo, Y.-C., Yoo, W.J. (2007-10). Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer. IEEE Transactions on Electron Devices 54 (10) : 2699-2705. ScholarBank@NUS Repository. https://doi.org/10.1109/TED.2007.904396 00189383 http://scholarbank.nus.edu.sg/handle/10635/82246 000249904100017 Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
topic	Dual tunneling layer (DTL) Endurance High-k trapping layer Program/erase speed Retention
spellingShingle	Dual tunneling layer (DTL) Endurance High-k trapping layer Program/erase speed Retention Wang, Y.Q. Hwang, W.S. Zhang, G. Samudra, G. Yeo, Y.-C. Yoo, W.J. Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer
description	10.1109/TED.2007.904396
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Wang, Y.Q. Hwang, W.S. Zhang, G. Samudra, G. Yeo, Y.-C. Yoo, W.J.
format	Article
author	Wang, Y.Q. Hwang, W.S. Zhang, G. Samudra, G. Yeo, Y.-C. Yoo, W.J.
author_sort	Wang, Y.Q.
title	Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer
title_short	Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer
title_full	Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer
title_fullStr	Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer
title_full_unstemmed	Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer
title_sort	electrical characteristics of memory devices with a high-k hfo2 trapping layer and dual sio2/si3 n4 tunneling layer
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/82246
_version_	1781784090110853120

Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer

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